1. Field of the Invention
The present invention relates generally to epitaxially grown guard ring edge termination structures for vertical and lateral SiC power semiconductor devices, SiC power devices having such guard rings, and methods of preparing these devices.
2. Background of the Technology
One distinguishing feature of semiconductor power devices is their high voltage blocking capability. The ability to support high voltages is largely determined by the onset of the phenomenon known as avalanche breakdown, which occurs when the electric field within the device structure becomes very large and the rate of impact ionization through the depletion region approaches infinity. The large electric fields in semiconductor devices that may trigger avalanche breakdown can occur both within the interior regions of the device, where current transport takes place, and at the edges of such devices. Proper design of semiconductor power devices requires careful attention to field distributions at the interior and at the edges to ensure high voltage blocking capability. B. Jayant Baliga, Power Semiconductor Devices, Chapter 3, pp. 66-125 (1996).
Silicon carbide (SiC) semiconductor devices are known to possess superior voltage blocking capability as compared with silicon (Si) semiconductor devices, and it is desired for power SiC semiconductor devices to have a breakdown voltage that is as high as possible. See, e.g., Bakowsky, et al., U.S. Pat. No. 5,967,795. Avalanche breakdown for SiC devices may occur when the maximum electric field within the device exceeds the critical electric field for SiC, which is believed to be from 2 to 4 MV/cm. The maximum electric field of such devices usually occurs wherever the depletion region has the smallest width, typically at the surface or edges of the device, and terminates in the vicinity of the junction, or interface between two semiconductor layers. In the context of this application, the term junction also refers to the interface between a semiconductor and a metal layer. The depletion region is the region across the junction where the mobile carrier densities approach zero, and the size and shape of the depletion region varies as a function of semiconductor design, including the nature of the junction between the different layers of such a device. The occurrence of high electric fields at the edges of these devices may significantly reduce the breakdown voltage of such devices. B. Jayant Baliga, Power Semiconductor Devices. One way to solve this problem is to use mesa etching, which simply removes semiconductor material from the region of highest electric field. This approach, however, requires advanced passivation steps to reduce surface leakage current. Another way to solve the problem is to extend the depletion region from the edge of the device. The typical methods used are:
extension of the electrode metal of a semiconductor device over the field oxide layer (so called field plates);
formation of a sequence of conductive regions with floating potential surrounding the device, typically, heavily doped diffused or implanted rings with conductivity type opposite to that of the device bulk (so called guard rings);
generation of a single wide diffused or implanted ring surrounding the device, with conductivity type opposite to that of the device bulk, which becomes fully depleted, and so that reduces potential gradient at the device edge (so called junction termination extension, or JTE).
Use of field plates is limited by relatively low voltages because of the finite dielectric strength of the field oxide between the plates and the device bulk. Because of the slow diffusion rates in SiC, JTE regions or guard rings are usually implanted, or introduced. For example, the use of junction termination extension structures has been suggested for different types of devices by Bakowsky, et al., U.S. Pat. No. 5,967,795; Mitlehner, et al., U.S. Pat. No. 5,712,502; Ueno, et al., U.S. Pat. No. 5,789,311; and Xueqing, et al., xe2x80x9cTheoretical and Experimental Study of 4Hxe2x80x94SiC Junction Edge Terminationxe2x80x9d, Materials Science Forum, Volumes 338-342, 1375-1378 (2000).
In addition, the use of guard rings, fabricated by combination of ion implantation and etching steps is disclosed by, e.g., Chang, et al., U.S. Pat. No. 4,982,260. An implementation of implanted p-type guard ring in a lateral MOSFET was also disclosed in Spitz, et al., IEEE Electron Devices Ltrs., Vol. 19No. 4, (1988). Unlike the implanted guard rings in the cases mentioned above, epitaxially grown guard rings (EGR) are not believed to affect electron flow in the drift region, and are further believed to improve the traditional RESURF technology disclosed in Ludikhuize, xe2x80x9cA Review of RESURF Technologyxe2x80x9d, ISPSD (2000).
However, ion implantation is a costly fabrication step which requires a high temperature post implant annealing, and it may also lead to surface and bulk damage, which may result in a significant increase in leakage current. Therefore, there still exists a need for a better method for forming guard ring edge termination structures on SiC power semiconductor devices.
In accordance with one aspect of the present invention, diodes and transistors in SiC which implement edge termination structure by guard rings formed from a p-type epitaxial SiC layer, grown on top of an n-type SiC drift region are provided. In such known devices as bipolar junction transistors (BJTs), static induction transistors (SITs), and PiN diodes, this novel edge termination structure may be self-aligned, because it may be done at the same etching step with formation of another part of the device, for example PiN diode anode region, BJT overgrown base region, or SIT overgrown gate region.
A second aspect of the present invention provides a Schottky barrier diode in SiC having guard rings formed from a doped p-type epitaxial layer, grown on top of an n-type drift region. Further, in accordance with a third aspect of the present invention, lateral SiC semiconductor devices, such as LMOSFETs and lateral diodes having guard rings formed from a doped p-type epitaxial layer, grown on top of a lightly doped n-type drift region are provided.
The present invention is further directed to methods of preparing these semiconductor devices having the disclosed novel edge termination structures.
It should be noted that the enumerated SiC semiconductor devices are representative only, and are not intended to limit the scope of the invention to the disclosed devices. Furthermore, the number size, and spacing of the epitaxial guard rings may vary, depending on the application and the desired target blocking voltage and are not limited to the representative examples provided in this specification.